Design & Reuse
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arrow Embedded Memories (1006)
arrow I/O Library (958)
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958 IP
151
1.0
I/O:Ultra Small Size Dup-Pad total solution
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152
1.0
800MHz LVDS Cell Set for 180nm
The OT3910 is a set of cells for implementing 800Mb DDR (400MHz) LVDS IO in 180n CMOS processes. Includes transmitter and receiver IO's. Also core ...
153
1.0
PAD - SMIC 110nm generic
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154
1.0
ICRD 0.5um IO library
ICRD 0.5um process 5V Generic IO library...
155
1.0
MCU PAD - SMIC 55nm Eflash
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156
1.0
MCU PAD - SMIC 55nm Eflash
...
157
1.0
MCU PAD - SMIC 55nm Eflash
...
158
1.0
VeriSilicon CHRT 0.13um 1.2V/2.5V DUPIO_01 Library
VeriSilicon CHRT 0.13um 1.2V/2.5V DUP I/O Cell Library developed by VeriSilicon is optimized for Chartered Semiconductor Manufacturing (CHRT) 0.13um L...
159
1.0
VeriSilicon CHRT 0.13um 1.2V/3.3V DUPIO_01 Library
VeriSilicon CHRT 0.13um 1.2V/3.3V DUP I/O Cell Library developed by VeriSilicon is optimized for Chartered Semiconductor Manufacturing (CHRT) 0.13um L...
160
1.0
VeriSilicon GSMC 0.18um 1.8v/3v/5v Mult IO for SIMcard
VeriSilicon GSMC 0.18um 1.8V/3.3V Multiple I/O Cell (08) Library developed by VeriSilicon is optimized for Grace Semiconductor Manufacturing Corporati...
161
1.0
VeriSilicon GSMC 0.18um (LP) 1.8V/3.3V Multiple I/O
VeriSilicon GSMC 0.18um (LP) 1.8V/3.3V Multiple I/O Cell (01E) Library developed by VeriSilicon is optimized for Grace Semiconductor Manufacturing Cor...
162
1.0
VeriSilicon GSMC 0.18um 1.8V/3.3V Multiple DUP I/O
VeriSilicon GSMC 0.18μm 1.8V/3.3V Multiple DUP I/O Cell (01E) Library developed by VeriSilicon is optimized for Grace Semiconductor Manufacturing Corp...
163
1.0
VeriSilicon GSMC 0.18um 1.8V/3.3V Multiple I/O (05) Library
VeriSilicon GSMC 0.18um 1.8V/3.3V Multiple I/O Cell (05) Library developed by VeriSilicon is optimized for Grace Semiconductor Manufacturing Corporati...
164
1.0
VeriSilicon IBM 65nm 1.0V/2.5V VPPIO_01 IO Library
VeriSilicon IBM 65nm 1.0V/2.5V VPPIO_01 IO library developed by VeriSilicon is optimized for IBM 65nm 10sf 1.0/2.5V process. This library provides 6.5...
165
1.0
VeriSilicon SMIC 0.11um 1.2V/3.3V ANALOGIO_DUP_05 IO Library
VeriSilicon SMIC 0.11um 1.2V/3.3V ANALOGIO_DUP_05 IO library developed by VeriSilicon is optimized for Semiconductor Manufacturing International Corpo...
166
1.0
VeriSilicon SMIC 0.11μm 1.2V/3.3V DUPIO_01 Library
VeriSilicon SMIC 0.11μm 1.2V/3.3V DUP I/O Cell Library developed by VeriSilicon is optimized for Semiconductor Manufacturing International Corporation...
167
1.0
VeriSilicon SMIC 0.13um 1.2V/2.5V ANALOGIO_DUP_05 IO Library
VeriSilicon SMIC 0.13um 1.2V/2.5V ANALOGIO_DUP_05 IO library developed by VeriSilicon is optimized for Semiconductor Manufacturing International Corpo...
168
1.0
VeriSilicon SMIC 0.13um 1.2V/3.3V Multiple DUP I/O Cell
VeriSilicon SMIC 0.13um 1.2V/3.3V Multiple DUP I/O Cell (05) Library developed by VeriSilicon supports power/ground pads, bi-directional I/O, IU (bi-d...
169
1.0
VeriSilicon SMIC 0.13um 1.2V/3.3V Multiple I/O 01C Library
VeriSilicon SMIC 0.13μm 3.3V Multiple I/O 01C Cell Library developed by VeriSilicon is optimized for Semiconductor Manufacturing International Corpora...
170
1.0
VeriSilicon SMIC 0.13um 1.2V/3.3V Multiple I/O Cell
VeriSilicon SMIC 0.13um 1.2V/3.3V Multiple I/O Cell (05) Library developed by VeriSilicon supports power/ground pads, bi-directional I/O, bidirectiona...
171
1.0
VeriSilicon SMIC 0.13um 1.2V/3.3V Multiple I/O Cell
VeriSilicon SMIC 0.13um 1.2V/3.3V Multiple I/O Cell (06) Library developed by VeriSilicon supports power/ground pads, bi-directional I/O, and input bu...
172
1.0
VeriSilicon SMIC 0.13um 1.2V/3.3V SSTLCOMBO_01 I/O Cell Library
VeriSilicon SMIC 0.13μm SSTL2/SSTL3 Combo I/O Cell Library developed by VeriSilicon is optimized for Semiconductor Manufacturing International Corpora...
173
1.0
VeriSilicon SMIC 0.13¦Ìm 1.2V/2.5V DUPIO_01 Library
VeriSilicon SMIC 0.13¦Ìm 1.2V/2.5V DUP I/O Cell Library developed by VeriSilicon is optimized for Semiconductor Manufacturing International Corporatio...
174
1.0
VeriSilicon SMIC 0.13¦Ìm 1.2V/3.3V ANALOGIO_DUP_05 IO Library
VeriSilicon SMIC 0.13um 1.2V/3.3V ANALOGIO_DUP_05 IO library developed by VeriSilicon is optimized for Semiconductor Manufacturing International Corpo...
175
1.0
VeriSilicon SMIC 0.13¦Ìm 1.2V/3.3V DUPIO_01 Library
VeriSilicon SMIC 0.13¦Ìm 1.2V/3.3V DUP I/O Cell Library developed by VeriSilicon is optimized for Semiconductor Manufacturing International Corporatio...
176
1.0
VeriSilicon SMIC 0.16um 1.8V/3.3V VPPIO_01 IO Library
VeriSilicon SMIC 0.16um 1.8V/3.3V VPPIO_01 IO library developed by VeriSilicon is optimized for Semiconductor Manufacturing International Corporation ...
177
1.0
VeriSilicon SMIC 0.18¦Ìm 1.8V/3.3V ANALOGIO_DUP_05 IO Library
VeriSilicon SMIC 0.18um 1.8V/3.3V ANALOGIO_DUP_05 IO library developed by VeriSilicon is optimized for Semiconductor Manufacturing International Corpo...
178
1.0
VeriSilicon SMIC 0.18¦Ìm 1.8V/3.3V VPPIO_DUP_01 IO Library
VeriSilicon SMIC 0.18um 1.8V/3.3V VPPIO_DUP_01 IO library developed by VeriSilicon is optimized for Semiconductor Manufacturing International Corporat...
179
1.0
VeriSilicon SMIC 0.18μm 1.8V/3.3V ANALOGIO_05 IO Library
VeriSilicon SMIC 0.18um 1.8V/3.3V ANALOGIO_05 IO library developed by VeriSilicon is optimized for Semiconductor Manufacturing International Corporati...
180
1.0
VeriSilicon SMIC 0.18μm 1.8V/3.3V CFIO_01 Library
VeriSilicon SMIC 0.18μm CF I/O Cell (01) Library developed by VeriSilicon is optimized for SMIC 0.18μm 1P6M Salicide logic process. This library suppo...
181
1.0
VeriSilicon SMIC 0.18µm 1.8V/3.3V VPPIO_01 IO Library
VeriSilicon SMIC 0.18um 1.8V/3.3V VPPIO_01 IO library developed by VeriSilicon is optimized for Semiconductor Manufacturing International Corporation ...
182
1.0
VeriSilicon TSMC 0.13¦Ìm 1.2V/2.5V DUPIO_01 Library
VeriSilicon TSMC 0.13¦Ìm 1.2V/2.5V DUP I/O Cell Library developed by VeriSilicon is optimized for Taiwan Semiconductor Manufacturing Company (TSMC) 0....
183
1.0
VeriSilicon TSMC 0.13¦Ìm 1.2V/3.3V DUPIO_01 Library
VeriSilicon TSMC 0.13¦Ìm 1.2V/3.3V DUP I/O Cell Library developed by VeriSilicon is optimized for Taiwan Semiconductor Manufacturing Company (TSMC) 0....
184
1.0
VeriSilicon UMC 0.18μm CF I/O
VeriSilicon UMC 0.18μm CF I/O Cell (01) Library developed by VeriSilicon is optimized for UMC 0.18μm 1.8v/3.3v 1P6M Generic II logic process...
185
1.0
VeriSilicon UMC 0.18μm CF I/O
VeriSilicon UMC 0.18μm CF I/O Cell (01) Library developed by VeriSilicon is optimized for UMC 0.18μm 1.8v/3.3v 1P6M Generic II logic process. This lib...
186
1.0
HHGrace 0.11um LP Multiple Power Supply IO library
Multiple power supply IO library for HHGrace 0.11um Eflash Low Power Dual Gate ( 1.5V/5V ) process...
187
1.0
HHGrace 0.11um LP Multiple Power Supply IO library
...
188
1.0
HHGrace 0.11um ULL Multiple power supply IO library
Multiple power supply IO library for HHGrace 0.11um Eflash Ultra Low Leakage Dual Gate ( 1.5V/5V ) process...
189
1.0
HHGrace 0.13um LP DG Multiple Power Supply IO library
Multiple power supply IO library for HHGrace 0.13um Eflash Low Power Dual Gate ( 1.5V/5V ) process...
190
1.0
Silterra 0.11um ULL Process Multiple power supply IO library with high voltage tolerance
Silterra 0.11um Ultra Multiple power supply IO Library with high voltage tolerance...
191
1.0
Silterra 0.18um ULL Process Multiple power supply IO library with high voltage tolerance
Silterra 0.18um Ultra Multiple power supply IO Library with high voltage tolerance...
192
1.0
HLMC 55nm LP Multiple Power Supply IO library
Multiple power supply IO library for Huali55nm low power 1.2v/2.5v process...
193
1.0
GLOBALFOUNDARIES 22nm FDSOI LVDS Transceiver Pad
The LVDS IO library provides IO cells for LVDS transmitter and receiver. The transmitter (TX) supports LVDS differential driver mode, and the receiver...
194
1.0
GlobalFoundries 0.13um 2.5v IO Library
Global Foundry 0.13um process 1.2v/2.5v Generic IO library...
195
1.0
GlobalFoundries 0.13um 3.3v IO library
Global Foundry 0.13um process 1.2v/3.3v Generic IO library...
196
1.0
GLOBALFOUNDRIES 28nm SLP 1.8v/1.0v SUBLVDSTX
...
197
1.0
GLOBALFOUNDRIES 28nm SLP Multiple Power Supply IO library
Multiple power supply IO library for GF28nm low power 1.0v/2.5v process...
198
1.0
GLOBALFOUNDRIES 28nm SLP sub-LVDS Receiver
The sub-LVDS Receiver IP is designed as an interface to bridge Video Image Sensors and processors. The receiver consists of PHY only....
199
1.0
GLOBALFOUNDRIES 65nm LVDS Transmitter
The LVDS transmitter is designed to support Single Link transmission between Host and Flat Panel Display with up to SXGA+ resolution and Dual Link tra...
200
1.0
UMC 0.18um IO Library
UMC 0.18um process 1.8v/3.3v Generic IO library...