Design & Reuse
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arrow I/O Library (1020)
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1020 IP
151
2.0
CML I/O Pad Set
The CML library provides a differential clock driver, a voltage reference, and power cells to support REFCLK signaling for PCIe applications....
152
2.0
CML I/O Pad Set
The CML library provides a differential current mode logic clock driver to support REFCLK signaling in PCIe applications along with a CML voltage refe...
153
2.0
ONFI 4 IO Pad Set
The ONFI 4.0 library provides the combo driver / receiver cells, the ODT / driver impedance calibration cell, and the voltage reference cell to suppor...
154
2.0
ONFI 4.1 I/O Pad Set
The ONFI 4.1 library provides the combo driver / receiver cells, the ODT / driver impedance calibration cell, and the voltage reference cell to supp...
155
2.0
ONFI_3 IO Pad Set
The ONFI 3.0 library provides the combo driver / receiver cells, the ODT / driver impedance calibration cell, and the voltage reference cell to suppor...
156
2.0
ONFI_3 IO Pad Set
The ONFI 3.0 library provides the combo driver / receiver cells, the ODT / driver impedance calibration cell, and the voltage reference cell to suppor...
157
2.0
ONFI_4 IO Pad Set
The ONFI 4.1 library provides the combo driver / receiver cells, the ODT / driver impedance calibration cell, and the voltage reference cell to suppor...
158
2.0
ONFI_4 IO Pad Set
The ONFI 4.0 library provides the combo driver / receiver cells, the ODT / driver impedance calibration cell, and the voltage reference cell to suppor...
159
2.0
LPDDR2 / LPDDR3 / DDR3 / DDR3L / DDR3U / DDR4 Combo I/O Pad Set
The LPDDR2/3_DDR3/4 library includes the combo driver/receiver cells with embedded power cells, the driver impedance calibration cell, and a full comp...
160
2.0
LPDDR2 / LPDDR3 / DDR3 / DDR3L / DDR3U / DDR4 Combo I/O Pad Set
The LPDDR2/3_DDR3/4 library includes the combo driver/receiver cells with embedded power cells, the driver impedance calibration cell, and a full comp...
161
2.0
USB 2.0 OTG ESD Protection I/O Pad Set
The USB 2.0 OTG ESD Protection library provides a comprehensive ESD solution for USB 2.0 hard macro cells....
162
2.0
ESD Protection
The ESD Protection library provides ESD protection components. In addition to core-placeable ESD protection cells, discrete components (RF diodes and ...
163
2.0
HSTL I/O Pad Set
The HSTL library includes the driver / receiver cells and a full complement of power and support cells for both single-ended and differential signalin...
164
2.0
SSTL with bi-directional I/O’s, Vref, and ODT for DDR2 memory (1.8 V)
The DDR2 / DDR3 library includes the combo driver / receiver cells and a full complement of power and support cells for both single-ended and differen...
165
2.0
SSTL_ I/O Pad Set
The SSTL_2 pad set is a full complement of I/O, power, and spacer cells (total of 14 cells) that are necessary to assemble a padring by abutment. Sinc...
166
2.0
SSTL_15 / SSTL_18 Combo I/O Pad Set
The SSTL_15_18 combo pad set supports bidirectional single-ended and differential SSTL_15 and SSTL_18 signaling. The driver/receiver pairs, with embe...
167
2.0
SSTL_15 / SSTL_18 Combo I/O Pad Set
The SSTL_15 / SSTL_18 library supports bidirectional single-ended and differential SSTL_15 and SSTL_18 signaling. The driver/receiver pairs, with emb...
168
2.0
SSTL_15 IO Pad Set
The SSTL_15 pad set supports bidirectional single-ended and differential SSTL_15 signaling. The driver/receiver pairs, with embedded power cells, ar...
169
2.0
SSTL_15 IO Pad Set
The SSTL_15 library supports bidirectional single-ended and differential SSTL_15 signaling. The driver/receiver pairs, with embedded power cells, are...
170
2.0
subLVDS I/O Pad Set
The subLVDS library provides a subLVDS driver, receiver, and temperature stable voltage reference capable of supporting 16 drivers operating at data...
171
2.0
subLVDS IO Pad Set
The subLVDS library provides an subLVDS driver, receiver, and temperature stable voltage reference capable of supporting 16 drivers operating at data ...
172
2.0
subLVDS IO Pad Set
The subLVDS library provides an subLVDS driver, receiver, and temperature stable voltage reference capable of supporting 16 drivers operating at data ...
173
2.0
5V Programmable GPIO
The 5V General Purpose I/O libraries provide bidirectional I/O, analog I/O, and a full complement of I/O power, core power, and analog power cells alo...
174
2.0
LVDS I/O Pad Set
The LVDS library provides an LVDS driver, receiver, and temperature stable voltage reference capable of supporting 16 drivers operating at data rate...
175
2.0
LVDS I/O Pad Set
The LVDS library provides an LVDS driver, receiver, and temperature stable voltage reference capable of supporting 16 drivers operating at data rates ...
176
2.0
LVDS I/O Pad Set
The LVDS library provides an LVDS driver, receiver, and temperature stable voltage reference capable of supporting 16 drivers operating at data rates ...
177
2.0
LVDS I/O Pad Set
The LVDS library provides an LVDS driver, receiver, and temperature stable voltage reference capable of supporting 16 drivers operating at data rates ...
178
2.0
LVDS I/O Pad Set
The LVDS library provides an LVDS driver, receiver, and temperature stable voltage reference capable of supporting 16 drivers operating at data rate...
179
2.0
LVDS IO Pad Set
The LVDS library provides an LVDS driver, receiver, and temperature stable voltage reference capable of supporting 16 drivers operating at data rates ...
180
2.0
LVDS IO Pad Set
The LVDS library provides an LVDS driver, receiver, and temperature stable voltage reference capable of supporting 16 drivers operating at data rates ...
181
2.0
LVDS IO Pad Set
The LVDS library provides an LVDS driver, receiver, and temperature stable voltage reference capable of supporting 16 drivers operating at data rates ...
182
1.0
4 Gbps DDR CML receiver and transmitter
055TSMC_CML_01 is a library including: - CML receiver (CML_RX); - CML transmitter (CML_TX). The CML_RX block is intended to receive a CML signal a...
183
1.0
1.6 Gbps DDR Programmable LVDS Transmitter/Receiver
090TSMC_LVDS_02 consists of transmitter (LVDSOUT), receiver (LVDSIN) and a bias. The LVDS transmitter consists of a current source (nominal 3.5mA) tha...
184
1.0
I/O:Ultra Small Size Dup-Pad total solution
...
185
1.0
I/O:Ultra Small Size Dup-Pad total solution
...
186
1.0
800MHz LVDS Cell Set for 180nm
The OT3910 is a set of cells for implementing 800Mb DDR (400MHz) LVDS IO in 180n CMOS processes. Includes transmitter and receiver IO's. Also core ...
187
1.0
32:1 serializer followed by sub-LVDS drivers
The CCP2 transmitter consists of a 32:1 serializer followed by LVDS drivers for transmitting clock (or strobe) and data. The LVDS drivers operate in s...
188
1.0
650M LVDS transmitter, 5 channel
The LVDS transmitter is designed to support Single Link transmission between Host and Flat Panel Display with up to SXGA+ resolution and Dual Link tra...
189
1.0
PAD - SMIC 110nm generic
...
190
1.0
Samsung 28nm FDSOI 1.8v/1.0v LVDS Transmitter
...
191
1.0
Samsung 28nm FDSOI 1.8v/1.0v sub-LVDS Receiver
...
192
1.0
IBM 65nm LVDS Receiver
The LVDS Receiver converts up to 10 pairs of LVDS data streams into 70-bit of CMOS data and then feeds the data to the logic core that can support Sin...
193
1.0
IBM 65nm LVDS Transmitter
The LVDS transmitter is designed to support Single Link transmission between Host and Flat Panel Display with up to SXGA+ resolution and Dual Link tra...
194
1.0
IBM 65nm LVDS Transmitter
The LVDS transmitter converts 28-bit data into 4-pair LVDS data stream. A phase-locked transmit clock is transmitted in parallel with the data stream ...
195
1.0
IBM 65nm Mini-LVDS Transmitter
The Mini-LVDS transmitter converts up to 64-bit CMOS data into 16-pairs of Mini-LVDS data stream that can support Single-Link transmission with up to ...
196
1.0
ICRD 0.5um IO library
ICRD 0.5um process 5V Generic IO library...
197
1.0
MCU PAD - SMIC 55nm Eflash
...
198
1.0
MCU PAD - SMIC 55nm Eflash
...
199
1.0
MCU PAD - SMIC 55nm Eflash
...
200
1.0
VeriSilicon CHRT 0.13um 1.2V/2.5V DUPIO_01 Library
VeriSilicon CHRT 0.13um 1.2V/2.5V DUP I/O Cell Library developed by VeriSilicon is optimized for Chartered Semiconductor Manufacturing (CHRT) 0.13um L...